module sva_ca_repetition_2; // 再测

    logic clk;
    initial begin
        clk = 0;
        forever #5 clk = ~clk;
    end

    logic a, b, c;
    initial begin
        a=1; b=1; c=0; #5;  
        a=0; b=0; c=0; #10; 
        a=1; b=0; c=0; #10; 
        a=0; b=1; c=0; #10; 
        a=1; b=0; c=0; #10; 
        a=0; b=1; c=1; #10; 
        a=0; b=1; c=1; #10; 
        a=0; b=1; c=1; #10; 
        a=0; b=1; c=0; #10;
        a=0; b=1; c=0; #10;
        a=0; b=1; c=0; #10;
        a=0; b=1; c=0; #10;
        a=0; b=1; c=0; #10;
        $finish;
    end

    // goto repetition: a ##1 b[->2:10] ##1 c 等价于 a ##1 ((!b[*0:$] ##1 b)[*2:10]) ##1 c
    // 含义: 如果信号 a 在时钟上升沿为真, 则从下一个周期后开始, 信号 b 必须出现 3 次上升沿(可以连续, 不需要连续), 
    //      且在第 3 次 b 上升沿之后的下一周期, 信号 c 必须为真.
    property p1;
        @(posedge clk) a |-> ##1 b[->3] ##1 c;
    endproperty
    ap1: assert property(p1) $info("ap1 passed"); else $error("ap1 failed");

    // goto repetition:
    // 含义: 如果信号 a 在时钟上升沿为真, 则从下一个周期后开始, 信号 b 必须出现 3~5 次上升沿(可以连续, 不需要连续), 
    //      且在找到的最后一次 b 上升沿之后的下一周期, 信号 c 必须为真.
    property p2;
        @(posedge clk) a |-> ##1 b[->2:4] ##1 c;
    endproperty
    ap2: assert property(p2) $info("ap2 passed"); else $error("ap2 failed");

    initial begin
        $dumpfile("dump.vcd"); $dumpvars;
    end
endmodule

/* Output: QuestaSim
# ** Info: ap2 passed
#    Time: 65 ns Started: 25 ns  Scope: sva_ca_repetition_2.ap2 File: sva_ca_repetition_2.sv Line: 41
# ** Info: ap2 passed
#    Time: 65 ns Started: 5 ns  Scope: sva_ca_repetition_2.ap2 File: sva_ca_repetition_2.sv Line: 41
# ** Info: ap2 passed
#    Time: 75 ns Started: 45 ns  Scope: sva_ca_repetition_2.ap2 File: sva_ca_repetition_2.sv Line: 41
# ** Info: ap1 passed
#    Time: 75 ns Started: 25 ns  Scope: sva_ca_repetition_2.ap1 File: sva_ca_repetition_2.sv Line: 33
# ** Info: ap1 passed
#    Time: 75 ns Started: 5 ns  Scope: sva_ca_repetition_2.ap1 File: sva_ca_repetition_2.sv Line: 33
# ** Error: ap1 failed
#    Time: 85 ns Started: 45 ns  Scope: sva_ca_repetition_2.ap1 File: sva_ca_repetition_2.sv Line: 33
 */